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  d a t a sh eet objective speci?cation 2003 mar 20 tda8922 2 25 w class-d power amplifier integrated circuits
2003 mar 20 2 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 contents 1 features 2 applications 3 general description 4 quick reference data 5 ordering information 6 block diagram 7 pinning 8 functional description 8.1 general 8.2 pulse width modulation frequency 8.3 protections 8.3.1 overtemperature 8.3.2 short-circuit across loudspeaker terminals and to supply lines 8.3.3 start-up safety test 8.3.4 supply voltage alarm 8.4 differential audio inputs 9 limiting values 10 thermal characteristics 11 quality specification 12 static characteristics 13 switching characteristics 14 dynamic ac characteristics (stereo and dual se application) 15 dynamic ac characteristics (mono btl application) 16 application information 16.1 btl application 16.2 pin mode 16.3 output power estimation 16.4 external clock 16.5 heatsink requirements 16.6 output current limiting 16.7 pumping effects 16.8 reference design 16.9 pcb information for hsop24 package 16.10 classification 16.11 bill of materials for reference design 16.12 curves measured in reference design 16.13 application schematics 17 package outline 18 soldering 18.1 introduction 18.2 through-hole mount packages 18.2.1 soldering by dipping or by solder wave 18.2.2 manual soldering 18.3 surface mount packages 18.3.1 reflow soldering 18.3.2 wave soldering 18.3.3 manual soldering 18.4 suitability of ic packages for wave, reflow and dipping soldering methods 19 data sheet status 20 definitions 21 disclaimers
2003 mar 20 3 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 1 features high efficiency ( ~ 90%) operating supply voltage from 12.5 to 30 v very low quiescent current low distortion usable as a stereo single-ended (se) amplifier or as a mono amplifier in bridge-tied load (btl) fixed gain of 30 db in single-ended (se) and 36 db in bridge-tied load (btl) high output power good ripple rejection internal switching frequency can be overruled by an external clock no switch-on or switch-off plop noise short-circuit proof across load and to supply lines electrostatic discharge protection thermally protected. 2 applications television sets home-sound sets multimedia systems all mains fed audio systems car audio (boosters). 3 general description the tda8922 is a high efficiency class-d audio power amplifier with very low dissipation. the typical output power is 2 25 w. the device is available in the hsop24 power package with a small internal heatsink and in the dbs23p through-hole power package. depending on the supply voltage and load conditions, a very small or even no external heatsink is required. the amplifier operates over a wide supply voltage range from 12.5 to 30 v and consumes a very low quiescent current. 4 quick reference data note 1. see section 16.5. 5 ordering information symbol parameter conditions min. typ. max. unit general; v p = 20 v v p supply voltage 12.5 20 30 v i q(tot) total quiescent supply current no load connected - 55 75 ma h ef?ciency p o = 25 w; se: r l =2 8 w ; f i = 1 khz - 90 - % stereo single-ended con?guration p o output power r l =8 w ; thd = 10%; v p = 20 v; note 1 22 25 - w r l =4 w ; thd = 10%; v p = 15 v; note 1 22 25 - w mono bridge-tied load con?guration p o output power r l =8 w ; thd = 10%; v p = 15 v; note 1 46 50 - w type number package name description version tda8922th hsop24 plastic, heatsink small outline package; 24 leads; low stand-off height sot566-3 TDA8922J dbs23p plastic dil-bent-sil power package; 23 leads (straight lead length 3.2 mm) sot411-1
2003 mar 20 4 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 6 block diagram handbook, full pagewidth mgu994 out1 v ssp1 v ddp2 driver high out2 boot2 tda8922th (TDA8922J) boot1 driver low release1 switch1 enable1 control and handshake pwm modulator manager oscillator temperature sensor current protection stabi mode input stage mute 9 (3) 8 (2) in1 - in1 + 22 (15) 21 (14) 20 (13) 17 (11) 16 (10) 15 (9) v ssp2 v ssp1 driver high driver low release2 switch2 enable2 control and handshake pwm modulator 11 (5) sgnd1 7 (1) osc 2 (19) sgnd2 6 (23) mode input stage mute 5 (22) 4 (21) in2 - in2 + 19 (-) 24 (17) v ssd hw (1) 1 (18) v ssa2 12 (6) v ssa1 3 (20) v dda2 10 (4) v dda1 23 (16) 13 (7) 18 (12) 14 (8) v ddp2 prot stabi v ddp1 fig.1 block diagram. (1) pin hw (tda8922th only) should be connected to pin v ssd in the application. pin numbers in parenthesis refer to the TDA8922J.
2003 mar 20 5 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 7 pinning symbol pin description tda8922th TDA8922J v ssa2 1 18 negative analog supply voltage for channel 2 sgnd2 2 19 signal ground for channel 2 v dda2 3 20 positive analog supply voltage for channel 2 in2 - 4 21 negative audio input for channel 2 in2+ 5 22 positive audio input for channel 2 mode 6 23 mode selection input: standby, mute or operating osc 7 1 oscillator frequency adjustment or tracking input in1+ 8 2 positive audio input for channel 1 in1 - 9 3 negative audio input for channel 1 v dda1 10 4 positive analog supply voltage for channel 1 sgnd1 11 5 signal ground for channel 1 v ssa1 12 6 negative analog supply voltage for channel 1 prot 13 7 time constant capacitor for protection delay v ddp1 14 8 positive power supply voltage for channel 1 boot1 15 9 bootstrap capacitor for channel 1 out1 16 10 pwm output from channel 1 v ssp1 17 11 negative power supply voltage for channel 1 stabi 18 12 decoupling of internal stabilizer for logic supply hw 19 - handle wafer; must be connected to pin v ssd v ssp2 20 13 negative power supply voltage for channel 2 out2 21 14 pwm output from channel 2 boot2 22 15 bootstrap capacitor for channel 2 v ddp2 23 16 positive power supply voltage for channel 2 v ssd 24 17 negative digital supply voltage
2003 mar 20 6 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 handbook, halfpage mgu995 hw prot boot1 v ddp1 v ssp1 out1 boot2 v ssp2 out2 v ssd v ddp2 stabi mode v ssa1 v dda1 sgnd1 in1 + in1 - v dda2 in2 + in2 - v ssa2 sgnd2 osc tda8922th 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 fig.2 pin configuration tda8922th. handbook, halfpage TDA8922J mgu996 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 prot boot1 v ddp1 v ssp1 out1 boot2 v ssp2 out2 v ssd v ddp2 stabi mode v ssa1 v dda1 sgnd1 in1 + in1 - v dda2 in2 + in2 - v ssa2 sgnd2 osc fig.3 pin configuration TDA8922J.
2003 mar 20 7 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 8 functional description 8.1 general the tda8922 is a two channel audio power amplifier using class-d technology. a detailed application reference design is shown in fig.10. typical application schematics are shown in figs 37 and 38. the audio input signal is converted into a digital pulse width modulated (pwm) signal via an analog input stage and pwm modulator. to enable the output power transistors to be driven, this digital pwm signal is applied to a control and handshake block and driver circuits for both the high side and low side. in this way a level shift is performed from the low power digital pwm signal (at logic levels) to a high power pwm signal which switches between the main supply lines. a 2nd-order low-pass filter converts the pwm signal to an analog audio signal across the loudspeakers. the tda8922 one-chip class-d amplifier contains high power d-mos switches, drivers, timing and handshaking between the power switches and some control logic. for protection a temperature sensor and a maximum current detector are built-in. the two audio channels of the tda8922 contain two pwms, two analog feedback loops and two differential input stages. it also contains circuits common to both channels such as the oscillator, all reference sources, the mode functionality and a digital timing manager. the tda8922 contains two independent amplifier channels with high output power, high efficiency (90%), low distortion and a low quiescent current. the amplifier channels can be connected in the following configurations: mono bridge-tied load (btl) amplifier stereo single-ended (se) amplifiers. the amplifier system can be switched in three operating modes with pin mode: standby mode; with a very low supply current mute mode; the amplifiers are operational, but the audio signal at the output is suppressed operating mode; the amplifiers fully are operational with output signal. an example of a switching circuit for driving pin mode is illustrated in fig.4. for suppressing plop noise, the amplifier will remain automatically in the mute mode for approximately 150 ms before switching to the operating mode (see fig.5). during this time, the coupling capacitors at the input are fully charged. handbook, halfpage standby/ mute r r mute/on mode pin sgnd mbl463 + 5 v fig.4 example of mode selection circuit.
2003 mar 20 8 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 handbook, full pagewidth audio operating mute standby 4 v 2 v 0 v (sgnd) time v mode 100 ms >50 ms switching audio operating standby 4 v 0 v (sgnd) time mbl465 v mode 100 ms 50 ms switching fig.5 timing on mode selection input. when switching from standby to mute, there is a delay of 100 ms before the output starts switching. the audio signal is available after v mode has been set to operating, but not earlier than 150 ms after switching to mute. when switching from standby to operating, there is a first delay of 100 ms before the outputs starts switching. the audio signal is available after a second delay of 50 ms.
2003 mar 20 9 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 8.2 pulse width modulation frequency the output signal of the amplifier is a pwm signal with a carrier frequency of approximately 350 khz. using a 2nd-order lc demodulation filter in the application results in an analog audio signal across the loudspeaker. this switching frequency is fixed by an external resistor r osc connected between pin osc and v ssa . with the resistor value given in the schematic diagram of the reference design, the carrier frequency is typical 350 khz. the carrier frequency can be calculated using the following equation: if two or more class-d amplifiers are used in the same audio application, it is advisable to have all devices operating at the same switching frequency. this can be realized by connecting all osc pins together and feed them from a external central oscillator. using an external oscillator it is necessary to force pin osc to a dc-level above sgnd for switching from the internal to an external oscillator. in this case the internal oscillator is disabled and the pwm will be switched on the external frequency. the frequency range of the external oscillator must be in the range as specified in the switching characteristics; see chapter 13. in an application circuit: internal oscillator: r osc connected between pin osc and v ssa external oscillator: connect the oscillator signal between pins osc and sgnd; delete r osc and c osc . 8.3 protections temperature, supply voltage and short-circuit protections sensors are included on the chip. in the event that the maximum current or maximum temperature is exceeded the system will shut down. 8.3.1 o vertemperature if the junction temperature t j > 150 c, then the power stage will shut down immediately. the power stage will start switching again if the temperature drops to approximately 130 c, thus there is a hysteresis of approximately 20 c. 8.3.2 s hort - circuit across loudspeaker terminals and to supply lines when the loudspeaker terminals are short-circuited or if one of the demodulated outputs of the amplifier is short-circuited to one of the supply lines, this will be detected by the current protection. if the output current exceeds the maximum output current of 4 a, then the power stage will shut down within less than 1 m s and the high current will be switched off. in this state the dissipation is very low. every 100 ms the system tries to restart again. if there is still a short-circuit across the loudspeaker load or to one of the supply lines, the system is switched off again as soon as the maximum current is exceeded. the average dissipation will be low because of this low duty cycle. 8.3.3 s ta rt - up safety test during the start-up sequence, when pin mode is switched from standby to mute, the conditions at the output terminals of the power stage are checked. in the event of a short-circuit at one of the output terminals to v dd or v ss the start-up procedure is interrupted and the systems waits for open-circuit outputs. because the test is done before enabling the power stages, no large currents will flow in the event of a short-circuit. this system protects for short-circuits at both sides of the output filter to both supply lines. when there is a short-circuit from the power pwm output of the power stage to one of the supply lines (before the demodulation filter) it will also be detected by the start-up safety test. practical use of this test feature can be found in detection of short-circuits on the printed-circuit board. remark: this test is only operational prior to or during the start-up sequence, and not during normal operation. during normal operation the maximum current protection is used to detect short-circuits across the load and with respect to the supply lines. f osc 910 9 r osc ------------------ - hz =
2003 mar 20 10 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 8.3.4 s upply voltage alarm if the supply voltage drops below 12.5 v, the undervoltage protection circuit is activated and the system will shut down correctly. if the internal clock is used, this switch-off will be silent and without plop noise. when the supply voltage rises above the threshold level, the system is restarted again after 100 ms. if the supply voltage exceeds 32 v the overvoltage protection circuit is activated and the power stages will shut down. they are re-enabled as soon as the supply voltage drops below the threshold level. an additional balance protection circuit compares the positive (v dd ) and the negative (v ss ) supply voltages and is triggered if the voltage difference between them exceeds a certain level. this level depends on the sum of both supply voltages. an expression for the unbalanced threshold level is as follows: v th(unb) ? 0.15 (v dd +v ss ). example: with a symmetrical supply of 30 v, the protection circuit will be triggered if the unbalance exceeds approximately 9 v; see section 16.7. 8.4 differential audio inputs for a high common mode rejection ratio and a maximum of flexibility in the application, the audio inputs are fully differential. by connecting the inputs anti-parallel the phase of one of the channels can be inverted, so that a load can be connected between the two output filters. in this case the system operates as a mono btl amplifier and with the same loudspeaker impedance an approximately four times higher output power can be obtained. the input configuration for a mono btl application is illustrated in fig.6; for more information see chapter 16. in the stereo single-ended configuration it is also recommended to connect the two differential inputs in anti-phase. this has advantages for the current handling of the power supply at low signal frequencies. handbook, full pagewidth v in in1 + out1 power stage mbl466 out2 sgnd in1 - in2 + in2 - fig.6 input configuration for mono btl application.
2003 mar 20 11 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 9 limiting values in accordance with the absolute maximum rating system (iec 60134). notes 1. see section 16.6. 10 thermal characteristics note 1. see section 16.5. 11 quality specification in accordance with general quality specification for integrated circuits: snw-fq-611d if this device is used as an audio amplifier. symbol parameter conditions min. max. unit v p supply voltage - 30 v v mode input voltage on pin mode with respect to sgnd - 5.5 v v sc short-circuit voltage on output pins - 30 v i orm repetitive peak current in output pin note 1 - 4a t stg storage temperature - 55 +150 c t amb ambient temperature - 40 +85 c t vj virtual junction temperature - 150 c symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient in free air; note 1 tda8922th 35 k/w TDA8922J 35 k/w r th(j-c) thermal resistance from junction to case note 1 tda8922th 1.3 k/w TDA8922J 1.3 k/w
2003 mar 20 12 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 12 static characteristics v p = 25 v; t amb =25 c; measured in fig.10; unless otherwise speci?ed. notes 1. the circuit is dc adjusted at v p = 12.5 to 30 v. 2. with respect to sgnd (0 v). 3. the transition regions between standby, mute and operating mode contain hysteresis (see fig.7). 4. with respect to v ssp1 . symbol parameter conditions min. typ. max. unit supply v p supply voltage note 1 12.5 20 30 v i q(tot) total quiescent supply current no load connected - 55 75 ma i stb standby supply current - 100 500 m a mode select input; pin mode v mode input voltage note 2 0 - 5.5 v i mode input current v mode = 5.5 v -- 1000 m a v stb input voltage for standby mode notes 2 and 3 0 - 0.8 v v mute input voltage for mute mode notes 2 and 3 2.2 - 3.0 v v on input voltage for operating mode notes 2 and 3 4.2 - 5.5 v audio inputs; pins in1 - , in1+, in2+ and in2 - v i dc input voltage note 2 - 0 - v ampli?er outputs; pins out1 and out2 ? v oo(se) ? output offset voltage se; operating and mute -- 150 mv ?d v oo(se) ? variation of output offset voltage se; operating ? mute -- 80 mv ? v oo(btl) ? output offset voltage btl; operating and mute -- 215 mv ?d v oo(btl) ? variation of output offset voltage btl; operating ? mute -- 115 mv stabilizer output; pin stabi v o(stab) stabilizer output voltage mute and operating; note 4 11 13 15 v temperature protection t prot temperature protection activation 150 -- c t hys hysteresis on temperature protection - 20 - c
2003 mar 20 13 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 handbook, full pagewidth stby mute on 5.5 mbl467 v mode (v) 4.2 3.0 2.2 0.8 0 fig.7 behaviour of mode selection pin mode. 13 switching characteristics v dd = 25 v; t amb =25 c; measured in fig.10; unless otherwise speci?ed. note 1. frequency set with r osc according to the formula in section 8.2. symbol parameter conditions min. typ. max. unit internal oscillator f osc typical internal oscillator frequency r osc = 30.0 k w 290 317 344 khz f osc(int) internal oscillator frequency range note 1 210 - 600 khz external oscillator or frequency tracking v osc voltage on pin osc sgnd + 4.5 sgnd + 5 sgnd + 6 v v osc(trip) trip level for tracking on pin osc - sgnd + 2.5 - v f track frequency range for tracking 210 - 600 khz v p(osc)(ext) minimum symmetrical supply voltage for external oscillator application 15 -- v
2003 mar 20 14 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 14 dynamic ac characteristics (stereo and dual se application) v p = 20 v; r l =8 w ; f i = 1 khz; f osc = 310 khz; r sl < 0.1 w (note 1); t amb =25 c; measured in fig.10; unless otherwise speci?ed. notes 1. r sl is the series resistance of inductor of low-pass lc filter in the application. 2. output power is measured indirectly; based on r dson measurement. 3. total harmonic distortion is measured in a bandwidth of 22 hz to 22 khz. when distortion is measured using a lower order low-pass filter a significantly higher value is found, due to the switching frequency outside the audio band. maximum limit is guaranteed but may not be 100% tested. 4. output power measured across the loudspeaker load. 5. v ripple =v ripple(max) = 2 v (p-p); r s =0 w . 6. b = 22 hz to 22 khz; r s =0 w ; maximum limit is guaranteed, but may not be 100% tested. 7. b = 22 hz to 22 khz; r s =10k w . symbol parameter conditions min. typ. max. unit p o output power r l =8 w ; v p = 20 v; note 2 thd = 0.5% 18 20 - w thd = 10% 22 25 - w r l =8 w ; v p = 25 v; note 2 thd = 0.5% 29 33 - w thd = 10% 36 40 - w r l =4 w ; v p = 15 v; note 2 thd = 0.5% 18 20 - w thd = 10% 22 25 - w thd total harmonic distortion p o = 1 w; note 3 f i = 1 khz - 0.02 0.05 % f i = 10 khz - 0.15 - % g v(cl) closed loop voltage gain 29 30 31 db h ef?ciency p o = 25 w; f i = 1 khz; note 4 85 90 - % svrr supply voltage ripple rejection operating; note 5 f i = 100 hz - 55 - db f i = 1 khz 40 50 - db mute; f i = 100 hz; note 5 - 55 - db standby; f i = 100 hz; note 5 - 80 - db ? z i ? input impedance 45 68 - k w v n(o) noise output voltage operating r s =0 w ; note 6 - 200 400 m v r s =10k w ; note 7 - 230 -m v mute; note 8 - 220 -m v a cs channel separation note 9 - 70 - db ?d g v ? channel unbalance -- 1db v o(mute) output signal in mute note 10 -- 400 m v cmrr common mode rejection ratio v i(cm) = 1 v (rms) - 75 - db
2003 mar 20 15 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 8. b = 22 hz to 22 khz; independent of r s . 9. p o = 1 w; r s =0 w ; f i = 1 khz. 10. v i =v i(max) = 1 v (rms); maximum limit is guaranteed, but may not be 100% tested. 15 dynamic ac characteristics (mono btl application) v p = 15 v; r l =8 w ; f i = 1 khz; f osc = 310 khz; r sl < 0.1 w (note 1); t amb =25 c; measured in fig.10; unless otherwise speci?ed. notes 1. r sl is the series resistance of inductor of low-pass lc filter in the application. 2. output power is measured indirectly; based on r dson measurement. 3. total harmonic distortion is measured in a bandwidth of 22 hz to 22 khz. when distortion is measured using a low order low-pass filter a significant higher value will be found, due to the switching frequency outside the audio band. maximum limit is guaranteed but may not be 100% tested. 4. output power measured across the loudspeaker load. 5. v ripple =v ripple(max) = 2 v (p-p); r s =0 w . 6. b = 22 hz to 22 khz; r s =0 w ; maximum limit is guaranteed, but may not be 100% tested. 7. b = 22 hz to 22 khz; r s =10k w . 8. b = 22 hz to 22 khz; independent of r s . 9. v i =v i(max) = 1 v (rms); f i = 1 khz; maximum limit is guaranteed, but may not be 100% tested. symbol parameter conditions min. typ. max. unit p o output power r l =8 w ; v p = 15 v; note 2 thd = 0.5% 37 40 - w thd = 10% 46 50 - w thd total harmonic distortion p o = 1 w; note 3 f i = 1 khz - 0.015 0.05 % f i = 10 khz - 0.02 - % g v(cl) closed loop voltage gain 35 36 37 db h ef?ciency p o = 50 w; f i = 1 khz; note 4 85 90 - % svrr supply voltage ripple rejection operating; note 5 f i = 100 hz - 49 - db f i = 1 khz 36 44 - db mute; f i = 100 hz; note 5 - 49 - db standby; f i = 100 hz; note 5 - 80 - db ? z i ? input impedance 22 34 - k w v n(o) noise output voltage operating r s =0 w ; note 6 - 280 560 m v r s =10k w ; note 7 - 300 -m v mute; note 8 - 280 -m v v o(mute) output signal in mute note 9 -- 500 m v cmrr common mode rejection ratio v i(cm) = 1 v (rms) - 75 - db
2003 mar 20 16 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 16 application information 16.1 btl application when using the power amplifier in a mono btl application (for more output power), the inputs of both channels must be connected in parallel and the phase of one of the inputs must be inverted (see fig.6). in principle the loudspeaker can be connected between the outputs of the two single-ended demodulation filters. 16.2 pin mode for correct operation the switching voltage at pin mode should be debounced. if pin mode is driven by a mechanical switch an appropriate debouncing low-pass filter should be used. if pin mode is driven by an electronic circuit or microcontroller then it should remain at the mute voltage level for at least 100 ms before switching back to the standby voltage level. 16.3 output power estimation the output power in several applications (se and btl) can be estimated using the following expressions: se: maximum current: should not exceed 4 a. btl: maximum current: should not exceed 4 a. legend: r l = load impedance f osc = oscillator frequency t min = minimum pulse width (typical 190 ns) v p = single-sided supply voltage (so, if supply is 30 v symmetrical, then v p =30v) p o(1%) = output power just at clipping p o(10%) = output power at thd = 10% p o(10%) = 1.25 p o(1%) . 16.4 external clock the minimum required symmetrical supply voltage for external clock application is 15 v (equally, the minimum asymmetrical supply voltage for applications with an external clock is 30 v). when using an external clock the following accuracy of the duty cycle of the external clock has to be taken into account: 47.5% < d < 52.5%. a possible solution for an external clock oscillator circuit is illustrated in fig.8. p o(1%) r l r l 0.6 + --------------------- v p 1t min f osc C () 2 2r l ----------------------------------------------------------------------------------------- - = i o(peak) v p 1t min f osc C () r l 0.6 + ---------------------------------------------------- - = p o(1%) r l r l 1.2 + --------------------- 2v p 1t min f osc C () 2 2r l --------------------------------------------------------------------------------------------- = i o(peak) 2v p 1t min f osc C () r l 1.2 + -------------------------------------------------------- - = handbook, full pagewidth 1 14 7 2 11 13 10 4 5 6 8912 3 ctc 0 - 0 + astab - astab + - trigger + trigger retrigger mr 220 nf 5.6 v 4.3 v hop gnd mbl468 hef4047bt v dd 360 khz 320 khz v dda v ss 9.1 k w 2 k w 120 pf rtc clock rctc fig.8 external oscillator circuit.
2003 mar 20 17 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 16.5 heatsink requirements in some applications it may be necessary to connect an external heatsink to the tda8922. the determining factor is the 150 c maximum junction temperature t j(max) which cannot be exceeded. the expression below shows the relationship between the maximum allowable power dissipation and the total thermal resistance from junction to ambient: p diss is determined by the efficiency ( h ) of the tda8922. the efficiency measured in the tda8922 as a function of output power is given in fig.19. the power dissipation can be derived as function of output power (see fig.18). the derating curves (given for several values of the r th(j-a) ) are illustrated in fig.9. a maximum junction temperature t j = 150 c is taken into account. from fig.9 the maximum allowable power dissipation for a given heatsink size can be derived or the required heatsink size can be determined at a required dissipation level. example 1: p o =2 25 w into 8 w t j(max) = 150 c t amb =60 c p diss(tot) = 4.2 w (from fig.18) the required r th(j-a) = 21.4 k/w can be calculated. the r th(j-a) of the tda8922 in free air is 35 k/w; the r th(j-c) of the tda8922 is 1.3 k/w, thus a heatsink of 20.1 k/w is required for this example. in actual applications, other factors such as the average power dissipation with music source (as opposed to a continuous sine wave) will determine the size of the heatsink required. example 2: p o =2 25 w into 4 w t j(max) = 150 c t amb =60 c p diss(tot) = 5.5 w (from fig.18) the required r th(j-a) = 16.4 k/w. the r th(j-a) of the tda8922 in free air is 35 k/w; the r th(j-c) of the tda8922 is 1.3 k/w, thus a heatsink of 15.1 k/w is required for this example. 16.6 output current limiting to guarantee the robustness of the class-d amplifier the maximum output current which can be delivered by the output stage is limited. an overcurrent protection is included for each output power switch. when the current flowing through any of the power switches exceeds a defined internal threshold (e.g. in case of a short-circuit to the supply lines or a short-circuit across the load), the amplifier will shut down immediately and an internal timer will be started. after a fixed time (e.g. 100 ms) the amplifier is switched on again. if the requested output current is still too high the amplifier will switch-off again. thus the amplifier will try to switch to the operating mode every 100 ms. the average dissipation will be low in this situation because of this low duty cycle. if the overcurrent condition is removed the amplifier will remain operating. because the duty cycle is low the amplifier will be switched off for a relatively long period of time which will be noticed as a so-called audio-hole; an audible interruption in the output signal. r th(j-a) t j(max) t amb C p diss ----------------------------------- = handbook, halfpage 0 p diss (w) 30 20 10 0 20 100 t amb ( c) 40 (1) (2) (3) (4) (5) 60 80 mbl469 fig.9 derating curves for power dissipation as a function of maximum ambient temperature. (1) r th(j-a) = 5 k/w. (2) r th(j-a) = 10 k/w. (3) r th(j-a) = 15 k/w. (4) r th(j-a) = 20 k/w. (5) r th(j-a) = 35 k/w.
2003 mar 20 18 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 to trigger the maximum current protection in the tda8922, the required output current must exceed 4 a. this situation occurs in case of: short-circuits from any output terminal to the supply lines (v dd or v ss ) short-circuit across the load or speaker impedances or a load impedance below the specified values of 4 and 8 w . even if load impedances are connected to the amplifier outputs which have an impedance rating of 4 w , this impedance can be lower due to the frequency characteristic of the loudspeaker; practical loudspeaker impedances can be modelled as an rlc network which will have a specific frequency characteristic: the impedance at the output of the amplifier will vary with the input frequency. a high supply voltage in combination with a low impedance will result in large current requirements. another factor which must be taken into account is the ripple current which will also flow through the output power switches. this ripple current depends on the inductor values which are used, supply voltage, oscillator frequency, duty factor and minimum pulse width. the maximum available output current to drive the load impedance can be calculated by subtracting the ripple current from the maximum repetitive peak current in the output pin, which is 4 a for the tda8922. as a rule of thumb the following expressions can be used to determine the minimum allowed load impedance without generating audio holes: for se application. for btl application. where: z l = load impedance f osc = oscillator frequency t min = minimum pulse width (typical 190 ns) v p = single-sided supply voltage (so, if the supply is 30 v symmetrical, then v p =30v) i orm = maximum repetitive peak current in output pin; see also chapter 9 i ripple = ripple current. see the application notes (tbf) for a more detailed description of the implications of output current limiting. 16.7 pumping effects the tda8922 class-d amplifier is supplied by a symmetrical voltage (e.g v dd = +25 v and v ss = - 25 v). when the amplifier is used in a se configuration, a so-called pumping effect can occur. during one switching interval, energy is taken from one supply (e.g. v dd ), while a part of that energy is delivered back to the other supply line (e.g. v ss ) and visa versa. when the voltage supply source cannot sink energy, the voltage across the output capacitors of that voltage supply source will increase: the supply voltage is pumped to higher levels. the voltage increase caused by the pumping effect depends on: speaker impedance supply voltage audio signal frequency capacitor value present on supply lines source and sink currents of other channels. the pumping effect should not cause a malfunction of either the audio amplifier and/or the voltage supply source. for instance, this malfunction can be caused by triggering of the undervoltage or overvoltage protection or unbalance protection of the amplifier. see the application notes (tbf) for a more detailed description of the implications of output current limiting. 16.8 reference design the reference design for a single-chip class-d audio amplifier using the tda8922th is illustrated in fig.10. the printed-circuit board (pcb) layout is shown in fig.11. the bill of materials (bom) is given in table 1. 16.9 pcb information for hsop24 package the size of the pcb is 74.3 59.10 mm, dual sided 35 m m copper with 121 metallized through holes. the standard configuration has a symmetrical supply (typical 20 v) with stereo se outputs (typical 2 8 w ). the pcb is also suitable for a mono btl configuration (1 8 w ) with symmetrical and asymmetrical supply. it is possible to use several different output filter inductors such as 16rhbp or ep13 types to evaluate the performance against the price or size. 16.10 classi?cation the application shows optimized signal and emi performance. z l v p 1t min f osc C () i orm i ripple C ---------------------------------------------------- - 0.6 C 3 z l 2v p 1t min f osc C () i orm i ripple C -------------------------------------------------------- - 1.2 C 3
2003 mar 20 19 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... a gewidth mgu997 tda8922th c20 330 pf c10 100 nf c12 100 nf c11 220 nf c9 220 nf c8 220 nf on mute off r5 30 k w c17 470 nf r7 5.6 k w c16 470 nf r6 5.6 k w j4 (1) j3 c21 330 pf 8 10 12 7 6 1 3 24 18 13 19 23 20 v dda1 v ssa1 osc mode v dda v ssa v ssa 9 11 2 5 15 out1 boot1 boot2 out2 16 21 22 4 in1 + in1 - in2 + in2 - sgnd1 sgnd c13 100 nf c14 220 nf c15 100 nf 14 17 v ddp1 v ssp1 v ddp v dda v ssp r4 39 k w r3 39 k w z1 5.6 v s1 c34 100 nf c35 220 nf c36 100 nf c32 220 nf c33 47 pf v ssa2 v dda2 v ssd stabi prot hw v ssa v dda v ssp c37 100 nf c38 220 nf c39 100 nf c22 15 nf c23 15 nf c30 15 nf c31 15 nf c26 470 nf c27 470 nf r10 4.7 w c24 560 pf r11 4.7 w c25 560 pf r12 22 w r13 22 w c28 220 nf c29 220 nf l5 27 m h l6 27 m h v ddp2 v ssp2 v ddp sgnd se 4 w se 4 w out1 - out1 + out2 - out2 + v ssp sgnd2 j2 (4) j1 in 1 in 2 c18 470 nf r8 5.6 k w c19 470 nf r9 5.6 k w (2) btl 8 w l1 bead l2 bead c1 470 m f c3 47 m f c2 470 m f c6 100 nf c7 100 nf v ddp v ssp r1 (3) 10 k w r2 (3) 9.1 k w v dda v ssa c4 47 m f c5 47 m f gnd v ss v dd l3 bead l4 bead + 25 v - 25 v sgnd fig.10 single-chip class-d audio amplifier application diagram (reference design for se and btl). (1) btl: remove in2, r8, r9, c18, c19, c21 and close j3 and j4. (2) btl: connect loudspeaker between out1+ and out2 - . (3) btl: r1 and r2 are only required when an asymmetrical supply is used (v ss = 0 v). (4) in case of hum, close j1 and j2. every decoupling to ground (plane) must be made as close as possible to the pin. to handle 20 hz under all conditions in stereo se mode, the external power supply needs to have a capacitance of at least 4700 m f per supply line; v p = 27 v (max).
2003 mar 20 20 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 handbook, full pagewidth - out1 + v ss in1 in2 s1 z1 c19 c18 c16 c17 c26 c27 c4 c1 u1 1-2002 pcb version 4 j4 j3 c3 c38 c14 c33 c29 r13 r12 c28 r1 r2 r5 r11 r10 r6 r7 r9 r8 r4 r3 j1 j2 c6 c7 c34 c25 c24 c23 c22 c9 c12 c36 c37 c39 c15 c32 c13 c10 c31 c30 c35 c21 c20 c8 c11 c2 c5 l3 l2 l4 l5 l6 l1 on off tda8920/21/22/23/24th state of d art philips semiconductors v dd gnd - out2 + mbl496 top copper top silk screen bottom copper bottom silk screen fig.11 printed-circuit board layout for the tda8922th.
2003 mar 20 21 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 16.11 bill of materials for reference design table 1 single-chip class-d audio ampli?er printed-circuit board (pcb version 4; 1-2002) for tda8922th (see figs 10 and 11). bom item quantity reference part description 1 1 u1 tda8922th philips semiconductors b.v. 2 2 in1 and in2 cinch inputs farnell 152-396 3 2 out1 and out2 output connector augat 5kev-02 41v dd , gnd and v ss supply connector augat 5kev-03 5 2 l6 and l5 27 m h ep13 or 16rhbp 6 4 l1, l2, l3 and l4 bead murata bl01rn1-a62 7 1 s1 pcb switch knitter ate1e m-o-m 8 1 z1 5v6 bzx 79c5v6 do-35 9 2 c1 and c2 470 m f; 35 v panasonic m series eca1vm471 10 3 c3, c4 and c5 47 m f; 63 v panasonic nhg series eca1jhg470 11 6 c16, c17, c18, c19, c26 and c27 470 nf; 63 v mkt epcos b32529-c474-k 12 9 c8, c9, c11, c14, c28, c29, c32, c35 and c38 220 nf; 63 v smd 1206 13 10 c6, c7, c10, c12, c13, c15, c34, c36, c37 and c39 100 nf; 50 v smd 0805 14 2 c20 and c21 330 pf; 50 v smd 0805 15 4 c22, c23, c30 and c31 15 nf; 50 v smd 0805 16 2 c24, c25 560 pf; 100 v smd 0805 17 1 c33 47 pf; 25v smd 0805 18 2 r4 and r3 39 k w ; 0.1 w smd 0805 19 1 r5 30 k w ; 0.1 w smd 1206 20 1 r1 10 k w ; 0.1 w; optional smd 0805 21 1 r2 9.1 k w ; 0.1 w; optional smd 0805 22 4 r6, r7, r8 and r9 5.6 k w ; 0.1 w smd 0805 23 2 r13 and r12 22 w ; 1 w smd 2512 24 2 r10 and r11 4.7 w ; 0.25 w smd 1206 25 2 j1 and j2 solder dot jumpers for ground reference in case of hum (60 hz noise) 26 2 j3 and j4 wire jumpers for btl application 27 1 heatsink 30 mm sk400; ok for maximum music dissipation; 1/8 prated (2 75 w/8) in 2 4 w at t amb =70 c 28 1 printed-circuit board material 1.6 mm thick epoxy fr4 material, double sided 35 m m copper; clearances 300 m m; minimum copper track 400 m m
2003 mar 20 22 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 16.12 curves measured in reference design the curves illustrated in figs 20 and 21 are measured with a specified load impedance. spread in z l (e.g. due to the frequency characteristics of the loudspeaker) can trigger the maximum current protection circuit; see section 16.6. the curves illustrated in figs 30 and 31 show the effects of supply pumping when only one single-ended channel is driven with a low frequency signal; see section 16.7. handbook, halfpage mgx324 p o (w) 10 - 2 10 - 1 11010 2 thd + n (%) 10 2 10 1 10 - 1 10 - 2 10 - 3 (1) (2) (3) fig.12 thd + n as a function of output power. 2 8 w se; v p = 20 v. (1) 10 khz. (2) 1 khz. (3) 100 hz. handbook, halfpage mgx327 f i (hz) 10 10 2 10 3 10 4 10 5 thd + n (%) 10 2 10 1 10 - 1 10 - 2 10 - 3 (1) (2) fig.13 thd + n as a function of input frequency. 2 8 w se; v p = 20 v. (1) p o =10w. (2) p o =1w.
2003 mar 20 23 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 handbook, halfpage mgx325 p o (w) 10 - 2 10 - 1 11010 2 thd + n (%) 10 2 10 1 10 - 1 10 - 2 10 - 3 (1) (2) (3) fig.14 thd + n as a function of output power. 2 4 w se; v p = 15 v. (1) 10 khz. (2) 1 khz. (3) 100 hz. handbook, halfpage mgx328 f i (hz) 10 10 2 10 3 10 4 10 5 thd + n (%) 10 2 10 1 10 - 1 10 - 2 10 - 3 (1) (2) fig.15 thd + n as a function of input frequency. 2 4 w se; v p = 15 v. (1) p o =10w. (2) p o =1w. handbook, halfpage mgx326 p o (w) 10 - 2 10 - 1 11010 2 thd + n (%) 10 2 10 1 10 - 1 10 - 2 10 - 3 (1) (2) (3) fig.16 thd + n as a function of output power. 1 8 w btl; v p = 15 v. (1) 10 khz. (2) 1 khz. (3) 100 hz. handbook, halfpage mgx329 f i (hz) 10 10 2 10 3 10 4 10 5 thd + n (%) 10 2 10 1 10 - 1 10 - 2 10 - 3 (1) (2) fig.17 thd + n as a function of input frequency. 1 8 w btl; v p = 15 v. (1) p o =10w. (2) p o =1w.
2003 mar 20 24 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 handbook, halfpage mgx332 p diss (w) 2 0 4 8 6 10 (1) (2) (3) p o (w) 10 - 2 10 - 1 11010 2 fig.18 power dissipation as a function of output power. f i = 1 khz. (1) 2 4 w se, v p = 15 v. (2) 2 8 w se, v p = 20 v. (3) 1 8 w btl, v p = 15 v. handbook, halfpage h (%) 060 20 80 100 p o (w) 40 0 100 60 80 20 40 mgx333 (1) (2) (3) fig.19 efficiency as a function of output power. f i = 1 khz. (1) 2 8 w se, v p = 20 v. (2) 2 4 w se, v p = 15 v. (3) 1 8 w btl, v p = 15 v. handbook, halfpage p o (w) 10 25 15 30 35 v dd (v) 20 0 100 60 80 20 40 mgx336 (1) (2) (3) fig.20 output power as a function of supply voltage. thd+n= 0.5%; f i = 1 khz. (1) 1 8 w btl. (2) 2 4 w se. (3) 2 8 w se. handbook, halfpage p o (w) 10 25 15 30 35 v dd (v) 20 0 100 60 80 20 40 mgx337 (1) (2) (3) fig.21 output power as a function of supply voltage. thd + n = 10%; f i = 1 khz. (1) 1 8 w btl. (2) 2 4 w se. (3) 2 8 w se.
2003 mar 20 25 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 handbook, halfpage mgx330 a cs (db) - 80 - 100 - 60 - 20 - 40 0 f i (hz) 10 10 2 10 3 10 4 10 5 (2) (1) fig.22 channel separation as a function of input frequency. 2 8 w se; v p = 20 v. (1) p o =1w. (2) p o =10w. handbook, halfpage mgx331 a cs (db) - 80 - 100 - 60 - 20 - 40 0 f i (hz) 10 10 2 10 3 10 4 10 5 (2) (1) fig.23 channel separation as a function of input frequency. 2 4 w se; v p = 15 v. (1) p o =1w. (2) p o =10w. handbook, halfpage mgx340 g (db) 25 20 30 40 35 f i (hz) 10 10 2 10 3 10 4 10 5 (1) (2) (3) fig.24 gain as a function of input frequency. v i = 100 mv; r s = 5.6 k w ; c i = 330 pf. (1) 1 8 w btl, v p = 15 v. (2) 2 8 w se, v p = 20 v. (3) 2 4 w se, v p = 15 v. handbook, halfpage mgx341 g (db) 25 20 30 40 35 f i (hz) 10 10 2 10 3 10 4 10 5 (1) (2) (3) fig.25 gain as a function of input frequency. v i = 100 mv; r s =0k w . (1) 1 8 w btl, v p = 15 v. (2) 2 8 w se, v p = 20 v. (3) 2 4 w se, v p = 15 v.
2003 mar 20 26 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 handbook, halfpage i q (ma) 0 5 10 25 15 30 35 v dd (v) 20 0 100 60 80 20 40 mgx338 fig.26 quiescent current as a function of supply voltage. r l = . handbook, halfpage f clk (khz) 0 5 10 25 15 30 35 v dd (v) 20 290 320 300 310 mgx339 fig.27 clock frequency as a function of supply voltage. r l = . handbook, halfpage mgx346 svrr (db) - 80 - 100 - 60 - 20 - 40 0 f i (hz) 10 10 2 10 3 10 4 10 5 (2) (1) (3) fig.28 svrr as a function of input frequency. v p = 20 v; v ripple = 2 v (p-p) with respect to ground. (1) both supply lines in phase. (2) both supply lines in anti-phase. (3) one supply line rippled. handbook, halfpage svrr) (db) 03 145 v ripple(p-p) (v) 2 - 100 0 - 40 - 20 - 80 - 60 mgx347 (1) (2) (3) fig.29 svrr as a function of v ripple(p-p) . v p = 20 v; v ripple with respect to ground (in phase). (1) f ripple = 1 khz. (2) f ripple = 100 hz. (3) f ripple =10hz.
2003 mar 20 27 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 handbook, halfpage mgx334 2 0 4 8 6 10 (1) (2) p o (w) 10 - 2 10 - 1 11010 2 v ripple(p-p) (v) fig.30 supply voltage ripple as a function of output power. 3000 m f per supply line; f i =10hz. (1) 1 4 w se, v p = 15 v. (2) 1 8 w se, v p = 20 v. handbook, halfpage mgx335 v ripple(p-p) (v) 2 0 4 8 6 10 f i (hz) 10 10 2 10 3 10 4 (1) (2) fig.31 supply voltage ripple as a function of input frequency. 3000 m f per supply line. (1) p o = 10 w into 1 4 w se, v p = 15 v. (2) p o = 10 w into 1 8 w se, v p = 20 v. handbook, halfpage mgx342 100 400 200 500 600 f clk (khz) 300 thd + n (%) 10 1 10 - 1 10 - 2 10 - 3 (1) (2) (3) fig.32 thd + n as a function of clock frequency. v p = 20 v; p o = 1 w into 8 w . (1) 10 khz. (2) 1 khz. (3) 100 hz. handbook, halfpage i q (ma) 100 400 200 500 600 f clk (khz) 300 0 150 90 120 30 60 mgx344 fig.33 quiescent current as a function of clock frequency. v p = 20 v; r l = .
2003 mar 20 28 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 handbook, halfpage v res(rms) (mv) 100 400 200 500 600 f clk (khz) 300 0 1000 600 800 200 400 mgx345 fig.34 pwm residual voltage as a function of clock frequency. v p = 20 v; r l =8 w . handbook, halfpage p o (w) 100 400 200 500 600 f clk (khz) 300 0 50 30 40 10 20 mgx343 fig.35 output power as a function of clock frequency. v p = 20 v; r l =8 w ; f i = 1 khz; th d+n= 10%. handbook, halfpage mgx348 v o (v) 10 - 4 10 - 1 10 - 5 10 - 6 10 - 3 10 - 2 1 10 v mode (v) 6 5 4 3 2 1 0 fig.36 output voltage as a function of mode selection voltage. v i = 100 mv; f i = 1 khz. handbook, halfpage mgx349 s/n (db) 40 80 20 0 60 100 120 p o (w) 10 - 2 10 - 1 110 10 3 10 2 (1) (2) fig.36 signal-to-noise ratio as a function of output power. v p = 20 v; r s = 5.6 k w .; filter: 20 khz aes17 (1) 2 8 w se. (2) 1 8 w btl.
2003 mar 20 29 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... 16.13 application schematics handbook, full pagewidth out1 v ssp1 v ddp2 driver high mgu998 out2 boot2 tda8922th boot1 driver low release1 switch1 enable1 control and handshake pwm modulator r fb r fb manager oscillator temperature sensor current protection stabi mode r osc v ssa v mode c osc input stage mute 9 8 in1 - in1 + 22 21 20 17 16 15 v ssp2 v ssp1 driver high driver low release2 switch2 enable2 control and handshake pwm modulator 11 sgnd1 7 osc 2 sgnd2 sgnd sgnd 6 mode input stage mute 5 4 in2 - in2 + v in2 v in1 19 24 v ssd v ssa v ssp 0 v v ssa - 25 v v ddp v dda + 25 v hw 1 v ssa2 v ssa 12 v ssa1 3 v dda2 v dda 10 v dda1 23 13 18 14 v ddp2 prot stabi v ddp1 sgnd fig.37 typical se application schematic of tda8922th.
2003 mar 20 30 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... handbook, full pagewidth out1 v ssp1 v ddp2 driver high mgu999 out2 boot2 TDA8922J boot1 driver low release1 switch1 enable1 control and handshake pwm modulator r fb r fb manager oscillator temperature sensor current protection stabi mode r osc v ssa v mode c osc input stage mute 3 2 in1 - in1 + 15 14 13 11 10 9 v ssp2 v ssp1 driver high driver low release2 switch2 enable2 control and handshake pwm modulator 5 sgnd1 1 osc 19 sgnd2 sgnd sgnd 23 mode input stage mute 22 21 in2 - in2 + v in2 v in1 17 v ssd v ssa v ssp 0 v v ssa - 25 v v ddp v dda + 25 v 18 v ssa2 v ssa 6 v ssa1 20 v dda2 v dda 4 v dda1 16 7 12 8 v ddp2 prot stabi v ddp1 sgnd fig.38 typical se application schematic of TDA8922J.
2003 mar 20 31 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 17 package outlines unit a 4 (1) references outline version european projection issue date 02-01-30 03-02-18 iec jedec jeita mm + 0.08 - 0.04 3.5 0.35 dimensions (mm are the original dimensions) notes 1. limits per individual lead. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot566-3 0 5 10 mm scale hsop24: plastic, heatsink small outline package; 24 leads; low stand-off height sot566-3 a max. detail x a 2 3.5 3.2 d 2 1.1 0.9 h e 14.5 13.9 l p 1.1 0.8 q 1.7 1.5 2.7 2.2 v 0.25 w 0.25 yz 8 0 q 0.07 x 0.03 d 1 13.0 12.6 e 1 6.2 5.8 e 2 2.9 2.5 b p c 0.32 0.23 e 1 d (2) 16.0 15.8 e (2) 11.1 10.9 0.53 0.40 a 3 a 4 a 2 (a 3 ) l p q a q d y x h e e c v m a x a b p w m z d 1 d 2 e 2 e 1 e 24 13 1 12 pin 1 index
2003 mar 20 32 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 unit a 2 references outline version european projection issue date iec jedec jeita mm 4.6 4.3 a 4 1.15 0.85 a 5 1.65 1.35 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot411-1 98-02-20 02-04-24 0 5 10 mm scale d l l 1 l 2 e 2 e c a 4 a 5 a 2 m l 3 e 1 q w m b p 1 d z e 2 e e 123 j dbs23p: plastic dil-bent-sil power package; 23 leads (straight lead length 3.2 mm) sot411-1 v m d x h e h non-concave view b : mounting base side b b e 1 b p cd (1) e (1) z (1) de d h ll 3 m 0.75 0.60 0.55 0.35 30.4 29.9 28.0 27.5 12 2.54 12.2 11.8 10.15 9.85 1.27 e 2 5.08 2.4 1.6 e h 6 e 1 14 13 l 1 10.7 9.9 l 2 6.2 5.8 e 2 1.43 0.78 2.1 1.8 1.85 1.65 4.3 3.6 2.8 q j 0.25 w 0.6 v 0.03 x 45 b
2003 mar 20 33 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 18 soldering 18.1 introduction this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. wave soldering can still be used for certain surface mount ics, but it is not suitable for fine pitch smds. in these situations reflow soldering is recommended. 18.2 through-hole mount packages 18.2.1 s oldering by dipping or by solder wave the maximum permissible temperature of the solder is 260 c; solder at this temperature must not be in contact with the joints for more than 5 seconds. the total contact time of successive solder waves must not exceed 5 seconds. the device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (t stg(max) ). if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 18.2.2 m anual soldering apply the soldering iron (24 v or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. if the temperature of the soldering iron bit is less than 300 c it may remain in contact for up to 10 seconds. if the bit temperature is between 300 and 400 c, contact may be up to 5 seconds. 18.3 surface mount packages 18.3.1 r eflow soldering typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferably be kept: below 220 c for all the bga packages and packages with a thickness 2.5mm and packages with a thickness <2.5 mm and a volume 3 350 mm 3 so called thick/large packages below 235 c for packages with a thickness <2.5 mm and a volume <350 mm 3 so called small/thin packages. 18.3.2 w ave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 18.3.3 m anual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2003 mar 20 34 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 18.4 suitability of ic packages for wave, re?ow and dipping soldering methods notes 1. for more detailed information on the bga packages refer to the (lf)bga application note (an01026); order a copy from your philips semiconductors sales office. 2. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 3. for sdip packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 4. these packages are not suitable for wave soldering. on versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. on versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 5. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 6. wave soldering is suitable for lqfp, qfp and tqfp packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 7. wave soldering is suitable for ssop, tssop, vso and vssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. mounting package (1) soldering method wave reflow (2) dipping through-hole mount dbs, dip, hdip, sdip, sil suitable (3) - suitable surface mount bga, lbga, lfbga, sqfp, tfbga, vfbga not suitable suitable - dhvqfn, hbcc, hbga, hlqfp, hsqfp, hsop, htqfp, htssop, hvqfn, hvson, sms not suitable (4) suitable - plcc (5) , so, soj suitable suitable - lqfp, qfp, tqfp not recommended (5)(6) suitable - ssop, tssop, vso, vssop not recommended (7) suitable -
2003 mar 20 35 philips semiconductors objective speci?cation 2 25 w class-d power ampli?er tda8922 19 data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. 3. for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. level data sheet status (1) product status (2)(3) definition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn). 20 definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 21 disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change notification (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
? koninklijke philips electronics n.v. 2003 sca75 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. philips semiconductors C a worldwide company contact information for additional information please visit http://www.semiconductors.philips.com . fax: +31 40 27 24825 for sales of?ces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com . printed in the netherlands 753503/01/pp 36 date of release: 2003 mar 20 document order number: 9397 750 10757


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